Towards Low-Power and Low Data-Rate Software-Defined Radio Baseband with RISC-V Processor for Flexibility and Security

Event start: December 9, 2021, 10:00
Duration: 1 hour
Registration link: https://forms.gle/bYGkhiBH4ePKWirr6

Towards Low-Power and Low Data-Rate Software-Defined Radio Baseband with RISC-V Processor for Flexibility and Security

by Mohamed El Bouazzati

 

Thursday 09 December 2021, 10:00 – 11:00 EET

 

It is our pleasure to invite you to the guest talk “Towards Low-Power and Low Data-Rate Software-Defined Radio Baseband with RISC-V Processor for Flexibility and Security” by Mohamed El Bouazzati (PhD student at Lab-STICC, Université Bretagne Sud, Lorient, France).

 

Abstract

Internet of Things (IoT) implementations span all sectors around the world and there is an exponential increase in the number of IoT devices. Moreover, the IoT devices’ attack area has become significant and one of the potential entry points is their communication capabilities where many vulnerabilities and cyber-attacks are found. In this presentation, we will discuss the network processor requirements and challenges for resource-constrained IoT end-devices using low-data-rate Sub-GHz protocols. We will provide a state of the art of current flexible architectures using Software Defined Radio (SDR) in baseband processor, highlighting existing related vulnerabilities, attacks, and security mechanisms regarding protection, detection, and update. Finally, we will present our next research directions about a new architecture for flexible, secure and low power network-based RISC-V processors for IoT end-devices.

 

Keywords

Network Processor, Baseband Processor, RISC-V, Multi-layer host-based IDS, SDR, BLE, LoRaWAN, DoS, Jamming

 

About the speaker

Mohamed EL Bouazzati is a PhD student with Lab-STICC/Université Bretagne Sud, Lorient, France. He received the engineering degree in embedded systems and telecommunications from ENSEM, Casablanca, Morocco. He did an international exchange in electronic systems for biomedical (ESYBIO) at ENSEIRB-MATMECA, Bordeaux, France, and received the MSc degree from University of Bordeaux, France, in 2020. He then started his PhD studies at Université Bretagne Sud with the ARCAD team in the Lab-STICC lab. His work deals with the architecture and security of low power and low data rate communication devices. His research interests include baseband and network architecture with RISC-V processors, attacks and vulnerabilities in sub-GHz and 2.4 GHz IoT protocols, hardware performance monitors/counters (HPM/HPC) and intrusion detection systems (IDS).

 

Acknowledgements

This talk takes place in the framework of the “SUITED: Secure IoT Edge Device” project funded by PHC-Parrot (Franco-Estonian Hubert Curien Partnership) and coordinated by Tallinn University of Technology and Université de Bretagne Sud. The project deals with the design, implementation and demonstration of IoT edge devices targeted at two use-cases (swarm of UAVs and imaging flow cytometry). More information about the SUITED project: https://sway.office.com/oTY5T362T584W8Pi

 

The talk is also supported by C/COM/IT joint chapter of IEEE Estonia.

 

Practicalities

The presentation is scheduled to take place on Thursday 09 December 2021 from 10:00 to 11:00 (EET) in a hybrid format:

 

In case you want to participate in person in U02-208, note that the room limit (COVID-19 restriction) is 15 persons; kindly fill this form: https://forms.gle/bYGkhiBH4ePKWirr6  (first come, first served).

 

The presentation will last for 40 minutes, followed by 20 minutes for questions and discussion.

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